The various embodiments discussed herein relate to methods of manufacturing phase change memory devices.
Generally, phase change memory devices record data based on the difference between resistance of a phase change material layer in an amorphous state and resistance of the phase change material layer in a crystalline state. A reset current transits the phase change material layer from the crystalline state to the amorphous state, and a set current transits the phase change material layer from the amorphous state to the crystalline state. The reset and set currents may be transferred from a transistor or a diode on a substrate to the phase change material layer through a lower electrode, enabling the phase transition of the phase change material layer to occur. That is, data is recorded using the phase transition of the phase change material layer, which may have a relatively high resistance in the amorphous state and a relatively low resistance in the crystalline state.
The phase change material layer may have a cylindrical shape and may be formed in an opening through an insulating interlayer. The material of the phase change material layer may not have good step coverage, in which case the phase change material layer may not entirely or sufficiently fill the opening, for example, leaving voids or seams. The phase change material layer may be exposed to a high temperature (e.g., much greater than about 400° C.) in a heat treatment process to attempt to address this, although exposure to the high temperature is potentially damaging to the phase change memory device and still may not successfully fill the opening.